ARM Compiler toolchain Assembler ReferenceVersion 5.01
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SEV, WFE, WFI, and YIELD

Set Event, Wait For Event, Wait for Interrupt, and Yield.

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SEV{cond}

WFE{cond}

WFI{cond}

YIELD{cond}

where:

cond

is an optional condition code.

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These are hint instructions. It is optional whether they are implemented or not. If any one of them is not implemented, it executes as a NOP. The assembler produces a diagnostic message if the instruction executes as a NOP on the target.

SEV, WFE, WFI, and YIELD execute as NOP instructions in ARMv6T2.

SEV

SEV causes an event to be signaled to all cores within a multiprocessor system. If SEV is implemented, WFE must also be implemented.

WFE

If the Event Register is not set, WFE suspends execution until one of the following events occurs:

  • an IRQ interrupt, unless masked by the CPSR I-bit

  • an FIQ interrupt, unless masked by the CPSR F-bit

  • an Imprecise Data abort, unless masked by the CPSR A-bit

  • a Debug Entry request, if Debug is enabled

  • an Event signaled by another processor using the SEV instruction.

If the Event Register is set, WFE clears it and returns immediately.

If WFE is implemented, SEV must also be implemented.

WFI

WFI suspends execution until one of the following events occurs:

  • an IRQ interrupt, regardless of the CPSR I-bit

  • an FIQ interrupt, regardless of the CPSR F-bit

  • an Imprecise Data abort, unless masked by the CPSR A-bit

  • a Debug Entry request, regardless of whether Debug is enabled.

YIELD

YIELD indicates to the hardware that the current thread is performing a task, for example a spinlock, that can be swapped out. Hardware can use this hint to suspend and resume threads in a multithreading system.

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These ARM instructions are available in ARMv6K and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above.

These 16-bit Thumb instructions are available in ARMv6T2 and above.

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