3.5.6. MULS

Multiply using 32-bit operands, and producing a 32-bit result.

Syntax

MULS Rd, Rn, Rm

where:

Rd

is the destination register.

Rn, Rm

are registers holding the values to be multiplied.

Operation

The MUL instruction multiplies the values in the registers specified by Rn and Rm, and places the least significant 32 bits of the result in Rd. The condition code flags are updated on the result of the operation, see Conditional execution.

The results of this instruction does not depend on whether the operands are signed or unsigned.

Restrictions

In this instruction:

  • Rd, Rn, and Rm must only specify R0-R7

  • Rd must be the same as Rm.

Condition flags

This instruction:

  • updates the N and Z flags according to the result

  • does not affect the C or V flags.

Examples

    MULS    R0, R2, R0      ; Multiply with flag update, R0 = R0 x R2
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