Configuring Reset options in debug hardware

The following Advanced configuration settings are available when configuring reset options in debug hardware:

Allow ICE to latch System Reset (AllowICELatchSysRst)

When enabled, this option enables the debug hardware unit to extend the time the target controller holds the target in reset. This enables the debug hardware unit to apply breakpoint settings before the processor starts execution. This is useful for debugging a target from reset, and allows the unit to stop the processor on the first instruction fetch after reset has been released by the unit.

When this option is disabled, the breakpoint settings might only take effect after the processor has already started execution, preventing debugging of the application reset handler.

The default setting is True.

Allow ICE to perform TAP Reset (AllowICETAPReset)

A Test Access Port (TAP) reset on early processors, such as the ARM7TDMI, also reset the debug registers associated with the JTAG device.

Later processor, such as the ARM1176, are not affected by a TAP reset. The main purpose of a TAP reset is to reset the JTAG state machine in the TAP controller receiving commands from the debug hardware unit.

The default setting is True.

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