Post-mortem debugging

Post-mortem debugging enables you to examine the state of a system that has previously been running but is currently not connected to debug hardware.


Before you can examine a running target with debug hardware, you must configure the debug hardware unit for that target. If you have a target that is operating without a debug hardware unit connected, and you want to examine it to find out why it is behaving in a particular way, you must power-up the debug hardware unit and configure the connection without disturbing the state of the target. This requires that the debug hardware unit is powered before it is connected to the target.

The debug hardware unit includes power conditioning and switching circuitry that enables you to plug and unplug the JTAG cable without affecting the target.


The voltage reference used by the debug hardware unit JTAG circuit is generated from the VTref signal present on the JTAG connector. If this signal is not connected at the target, you must modify the target or the JTAG cable to supply a suitable reference. Connecting VTref to Vsupply is usually sufficient.


To connect to a running target:

  1. Ensure that the JTAG input lines TDI, TMS, nSRST, and nTRST have pull-up resistors (normal practice), and TCK has a pull-down resistor, so that when the adaptor is disconnected from the target these lines are in their quiescent state.

  2. Plug the power jack into the debug hardware unit and wait for it to boot.

  3. Configure the debug hardware connection. You must do one of the following:

    • load a configuration that you have previously saved

    • manually configure the connection

    • autoconfigure using a separate test system.


    Do not use autoconfigure on the target to be debugged, because doing so might reset the processor.

  4. If the target processor, such as an ARM7TDMI, does not have any system registers, you must explicitly configure the endianness.


    Do not automatically detect the endianness of target processors that do not have a system register. Doing so might disturb the state of the processor.

  5. Plug the JTAG cable into the target.


    To prevent unwanted resets during connection of the debug hardware, it is essential that either:

    • the target and debug hardware are properly earthed

    • the ground pins of the debug connector make contact before the signal pins.

  6. Start the debugger, and connect to the running target.

    In your debug hardware configuration, set the Post Reset State to Running.

    In your debugger, connect using the Connect (Connection Modes) of No Reset / No Stop.

  7. To get a high-level (source code) view of the problem, load the symbol table for your target program into the debugger.

  8. If the processor stopped during debugging, then in your debugger:

    1. Clear any breakpoints that you have set.

    2. Start the processor running

    3. Disconnect from all targets to which the debugger is connected on your development platform.

    If the processor is still running, then in your debugger disconnect from all targets to which the debugger is connected on your development platform.

  9. Unplug the JTAG connector from the development platform.

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