ARM DS-5 ARM RVI and RVT System and Interface Design Reference: RVI and RVT System Design Guidelines

RVI and RVT System Design Guidelines

The following topics provide information on developing ARM^® architecture-based devices and Printed Circuit Boards (PCBs) that can be debugged using ARM RVI™:

Using adaptive clocking to synchronize the JTAG port
Reset signals
ARM reset signals
RVI reset signals
Example reset circuits
ASIC guidelines
ICs containing multiple devices
Boundary scan test vectors
PCB guidelines
PCB connections
Target interface logic levels
JTAG signal integrity and maximum cable lengths.

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