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The following information applies to the HDLCD controller registers:
The base address is not fixed, and can be different for any particular system implementation. The offset of each register from the base address is fixed.
Do not attempt to access reserved or unused address locations. Attempting to access these locations can result in unpredictable behavior.
Unless otherwise stated in the accompanying text:
Do not modify undefined register bits.
Ignore undefined register bits on reads.
All register bits are reset to a logic 0 by a system or power-on reset.
Access type in Table B.1 is described as follows:
Read and write.
Read only.
Write only.