A.1.5. F-JTAG (ILA) connector

The F-JTAG (ILA) connector, J15, is connected to FPGA 1 and FPGA 2. Figure A.3 shows the F-JTAG (ILA) connector. You can use an ILA device such as ChipScope to debug designs in the FPGAs.

Note

Pins 2, 4, 6, and 10 on the F-JTAG (ILA) connector have pull-up resistors to 2V5.

Figure A.3. F-JTAG (ILA) connector, J15

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table A.3 lists the F-JTAG (ILA) pin mapping for each ILA signal. See the v2f_760.ucf and v2f_550t.ucf constraints files, available in application note AN233, LogicTile Express 13MG example design for a CoreTile Express A9x4, for FPGA mapping.

Table A.3. F-JTAG (ILA) connector, J15, signal list

PinSignalPinSignal
1GND2ILA_2V5
3GND4ILA_TMS
5GND6ILA_TCK
7GND8ILA_TDO
9GND10ILA_TDI
11GND12Not connected
13GND14Not connected

Copyright © 2010-2014 ARM. All rights reserved.ARM DUI 0556G
Non-ConfidentialID052914