Real-Time System Model Reference

Version 1.2


Table of Contents

Preface
About this book
Intended audience
Using this book
Glossary
Typographical conventions
Additional reading
Feedback
Feedback on this product
Feedback on this book
1. Introduction
1.1. Introduction to system models
1.2. Introduction to the VE RTSM
1.2.1. About the VE Real-Time System Models
1.3. Introduction to the MPS RTSM
1.3.1. About the MPS hardware
1.3.2. About the MPS RTSM
2. Getting Started with Real-Time System Models
2.1. Getting started with a debugger
2.1.1. Semihosting support
2.2. Getting started with Model Shell
2.3. Configuring the RTSM
2.3.1. Using a configuration GUI in your debugger
2.3.2. Setting model configuration options from Model Shell
2.4. Loading and running an application on the VE RTSM
2.5. Using the CLCD window
2.5.1. Using the VE CLCD window
2.5.2. Using the MPS Visualization window
2.6. Using Ethernet with a VE RTSM
2.6.1. Host requirements
2.6.2. Target requirements
2.6.3. Configuring Ethernet
2.7. Using a terminal with a system model
2.7.1. Telnet mode
2.7.2. Raw mode
2.8. Virtual filesystem
2.8.1. VFS operations
2.8.2. Using the VFS with a pre-built RTSM
3. Programmer’s Reference for the VE RTSMs
3.1. VE model memory map
3.2. VE model configuration parameters
3.2.1. Motherboard peripheral parameters
3.2.2. Motherboard virtual component parameters
3.2.3. RTSM_VE_Cortex-A15MPx1, RTSM_VE_Cortex-A15MPx2 and RTSM_VE_Cortex-A15MPx4 coretile parameters
3.2.4. RTSM_VE_Cortex-A9 coretile parameters
3.2.5. RTSM_VE_Cortex-R5_MPx1 and RTSM_VE_Cortex-R5_MPx2 coretile parameters
3.2.6. ARMv7A-AEM
3.3. Differences between the VE and coretile hardware and the models
3.3.1. Memory map
3.3.2. Memory aliasing
3.3.3. Features not present in the model
3.3.4. Features partially implemented in the model
3.3.5. Restrictions on the processor models
3.3.6. Timing considerations
4. Programmer’s Reference for the MPS RTSMs
4.1. MPS model memory map
4.1.1. MPS registers
4.2. MPS configuration parameters
4.2.1. MPS visualization configuration parameters
4.2.2. DUT configuration parameters
4.2.3. Terminal parameters
4.2.4. Core configuration parameters
4.3. Differences between the MPS hardware and the system model
4.3.1. Features not present in the model
4.3.2. Timing considerations

List of Tables

3.1. Memory map
3.2. CS2 peripheral memory map
3.3. CS3 peripheral memory map
3.4. Color LCD controller configuration parameters
3.5. Ethernet configuration parameters
3.6. System controller configuration parameters
3.7. System register configuration parameters
3.8. UART configuration parameters
3.9. Watchdog configuration parameters
3.10. FLASH loader configuration parameters
3.11. Host bridge configuration parameters
3.12. Multimedia card configuration parameters
3.13. Terminal configuration parameters
3.14. VFS2 configuration parameters
3.15. Visualization configuration parameters
3.16. RTSM_VE_Cortex-A15MPxn coretile parameters
3.17. RTSM_VE_Cortex-A15MPxn coretile parameters - individual cores
3.18. RTSM_VE_Cortex-A9_MPxn coretile parameters for the individual cores
3.19. RTSM_VE_CortexR5_MPxn coretile parameters
3.20. RTSM_VE_CortexR5_MPxn coretile parameters - individual cores
3.21. Multiprocessing parameters
3.22. Processor configuration parameters
3.23. Memory configuration parameters
3.24. General cache configuration parameters
3.25. Cache block configuration parameters
3.26. Debug architecture configuration parameters
3.27. Core configuration parameters
3.28. Core configuration parameters
3.29. Message severity levels
3.30. Message configuration parameters
4.1. Overview of MPS memory map
4.2. MPS CPU system registers
4.3. MPS DUT system registers
4.4. MPS LCD registers
4.5. Memory configuration
4.6. User switches
4.7. Seven-segment register
4.8. Visualization parameters
4.9. DUT configuration parameters
4.10. Terminal instantiation parameters
4.11. Configuration parameters

Proprietary Notice

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Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder.

The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”.

Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision AMay 2011First release for Fast Models 6.1.
Revision BJuly 2011Update for Fast Models v6.2.
Revision CNovember 2011Update for Fast Models v7.0.
Copyright © 2011 ARM. All rights reserved.ARM DUI 0575C
Non-ConfidentialID010512