General processor configuration

This topic describes processor configuration parameters. See the following table:

Table 24. Processor configuration parameters

ParameterDescriptionDefault
auxilliary_feature_register0Value for AFR0 ID register0
cpuIDValue for main CPU ID register0x411fc081
dic-spi_countNumber of shared peripheral interrupts implemented.64
dtcm0_baseDTCM base address at reset0
dtcm0_enableEnable DTCM at resetfalse
dtcm0_sizeDTCM size in KB32
FILTERENEnable filtering of accesses between master bus ports. This is usually not used inside a VE system and should be left false.false
FILTERENDEnd of region filtered to pvbus_m1. Values must be aligned to a 1MB boundary.0
FILTERSTARTStart of region filtered to pvbus_m1. Values must be aligned to a 1MB boundary.0
implements_ple_like_a8Add support for the PLE from a Cortex-A8 processorfalse
IS_VALIDATION[a]Reserved. Enables A9-validation-like trickbox-coprocessor, which is only usable in validation platform model.false
itcm0_baseITCM base address at reset0x40000000
itcm0_enableEnable ITCM at resetfalse
itcm0_sizeITCM size in KB32
PERIPHBASE[b]Base address of MP “private” peripherals (WatchdogTimers, GIC) (bits 31:13 used).0x13080000
siliconIDValue for Auxilliary ID register0x41000000
CFGSDISABLEDisables access to some registers in the internal interrupt controller peripheral.false
implements_virtualizationImplement the Virtualization extension in this processor. When set, this also enables LPAE.false
implements_lpaeImplement the Large Physical Address extension in this processor.false
use_Cortex-A15_peripheralsChanges the layout of the internal peripheral memory map to mimic that of the Cortex-A15 processor.false
delayed_CP15_operationsDelay the functional effect of CP15 operations.false
take_ccfail_undefTake undefined exceptions even if the instruction failed its condition codes check.false
low_latency_modeRun only a single instruction between checks for IRQ and other events. This ensures that when the platform raises an interrupt, the exception vector is taken immediately, but it involves a considerable penalty in performance.false

[a] IS_VALIDATION is not exposed in the VE platform model, and fixed as false.

[b] PERIPHBASE is not exposed in the VE platform model, and fixed as 0x2C000000.


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