FVP_VE_Cortex-A9 CoreTile parameters

The table below lists the Cortex-A9 MPCore parameters that you can change when you start the FVP_VE_Cortex-A9 model. This CoreTile FVP is based on r3p0 of the Cortex-A9 MPCore multiprocessor.

The table provides a description of the parameters for each Cortex-A9MP processor. These parameters are set individually for each Cortex-A9 processor you have in your system. Each processor has its own timer and watchdog.

The syntax to use in a configuration file is:


where n is the processor number, from 0 to 3 inclusive.

Table 20. FVP_VE_Cortex-A9_MPxn CoreTile parameters - individual processors

ParameterDescriptionTypeAllowed valueDefault value
semihosting-cmd_lineCommand line available to semihosting SVC calls.Stringno limit except memory[empty string]
semihosting-cwdVirtual address of CWD.String--
semihosting-enableEnable semihosting SVC traps.Booleantrue or falsetrue
semihosting-ARM_SVCA32 SVC number for semihosting.Integer0x000000 - 0xFFFFFF0x123456
semihosting-Thumb_SVCT32 SVC number for semihosting.Integer0x00 - 0xFF0xAB
semihosting-heap_baseVirtual address of heap base.Integer0x00000000 - 0xFFFFFFFF0x0
semihosting-heap_limitVirtual address of top of heap.Integer0x00000000 - 0xFFFFFFFF0x0F000000
semihosting-stack_baseVirtual address of base of descending stack.Integer0x00000000 - 0xFFFFFFFF0x10000000
semihosting-stack_limitVirtual address of stack limit.Integer0x00000000 - 0xFFFFFFFF0x0F000000

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