Fixed Virtual Platforms VE and MPS FVP Reference Guide

Version 1.4


List of Topics

Conventions and feedback
Introduction
About system models
About the VE FVP
About the MPS FVP
MPS hardware
MPS FVP
Getting Started with Fixed Virtual Platforms
FVP Debug
Starting the FVP using Model Shell
Configuring VE and MPS FVPs
Loading and running an application on the VE FVP
Using the VE CLCD window
Using the MPS Visualization window
Ethernet with a VE FVP
Use a terminal with a system model
Virtual File System
Use the VFS with a prebuilt FVP
Programmer’s Reference for the VE FVPs
VE model memory map
VE model parameters
VE motherboard peripheral parameters
VE color LCD controller parameters
VE Ethernet parameters
VE system controller parameters
VE system register block parameters
VE UART parameters
VE watchdog parameters
VE motherboard virtual component parameters
VE FLASH loader parameters
VE host bridge parameters
VE multimedia card parameters
VE terminal parameters
VE VFS2 parameters
VE visualization parameters
FVP_VE_Cortex-A15xn CoreTile parameters
ARMv8-A AEM parameters
ARMv8-A AEM general cluster parameters
ARMv8-A AEM abort parameters
ARMv8-A AEM GIC parameters
ARMv8-A AEM general core parameters
ARMv8-A AEM cryptography parameters
ARMv8-A AEM general cache parameters
ARMv8-A AEM L2 cache-controller parameters
ARMv8-A AEM TLB parameters
ARMv8-A AEM memory parameters
ARMv8-A AEM debug architecture parameters
ARMv8-A AEM message parameters
ARMv8-A AEM simulator parameters
ARMv8-A AEM semihosting parameters
ARMv8-A AEM boundary features and architectural checkers
ARMv8-A AEM IMPLEMENTATION DEFINED features
Differences between the VE and CoreTile hardware and the models
VE memory map
VE memory aliasing
Features not present in the VE model
Features partially implemented in the VE model
Restrictions on the VE processor models
VE timing considerations
Programmer’s Reference for the MPS FVPs
MPS model memory map
MPS registers
MPS processor system registers
MPS DUT system registers
MPS character LCD registers
MPS memory configuration and remap
MPS switches
MPS seven-segment display
MPS parameters
MPS visualization parameters
MPS DUT parameters
MPS terminal parameters
MPS processor parameters
Differences between the MPS hardware and the system model
Features not present in the MPS model
MPS timing considerations

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Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision A31 May 2011Release for Fast Models v6.1.
Revision B31 July 2011Update for v6.2.
Revision C30 November 2011Release for v7.0.
Revision D31 May 2012Update for v7.1.
Revision E31 December 2012Release for v8.0.
Revision F31 May 2013Update for v8.1.
Revision G31 August 2013Update for v8.2.
Revision H30 November 2013Update for v8.3.
Revision I31 May 2014Update for v8.4.
Copyright © 2011-2014 ARM. All rights reserved.ARM DUI 0575I
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