SBFX and UBFX

Signed and Unsigned Bit Field Extract. Copies adjacent bits from one register into the least significant bits of a second register, and sign extends or zero extends to 32 bits.

Show/hideSyntax

op{cond} Rd, Rn, #lsb, #width

where:

op

is either SBFX or UBFX.

cond

is an optional condition code.

Rd

is the destination register.

Rn

is the source register.

lsb

is the bit number of least significant bit in the bitfield, in the range 0 to 31.

width

is the width of the bitfield, in the range 1 to (32-lsb).

Show/hideRegister restrictions

You cannot use PC for any register.

You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

Show/hideCondition flags

These instructions do not alter any flags.

Show/hideArchitectures

These ARM instructions are available in ARMv6T2 and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above.

There are no 16-bit Thumb versions of these instructions.

Show/hideSee also

Reference:
Copyright © 2011 ARM. All rights reserved.ARM DUI 0588A
Non-ConfidentialID061811