SSAT16 and USAT16

Parallel halfword Saturating instructions.

SSAT16 saturates a signed value to a signed range.

USAT16 saturates a signed value to an unsigned range.

Show/hideSyntax

op{cond} Rd, #sat, Rn

where:

op

is one of:

SSAT16

Signed saturation.

USAT16

Unsigned saturation.

cond

is an optional condition code.

Rd

is the destination register.

sat

specifies the bit position to saturate to, and is in the range 1 to 16 for SSAT16, or 0 to 15 for USAT16.

Rn

is the register holding the operand.

Show/hideOperation

Halfword-wise signed and unsigned saturation to any bit position.

The SSAT16 instruction saturates each signed halfword to the signed range -2sat-1 ≤ x ≤ 2sat-1 -1.

The USAT16 instruction saturates each signed halfword to the unsigned range 0 ≤ x ≤ 2sat -1.

Show/hideRegister restrictions

You cannot use PC for any register.

You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

Show/hideCondition flags

If saturation occurs on either halfword, these instructions set the Q flag. To read the state of the Q flag, use an MRS instruction.

Show/hideArchitectures

These ARM instructions are available in ARMv6 and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above. For the ARMv7-M architecture, they are only available in an ARMv7E-M implementation.

There are no 16-bit Thumb versions of these instructions.

Show/hideExamples

    SSAT16  r7, #12, r7
    USAT16  r0, #7, r5

Show/hideIncorrect examples

    SSAT16  r1, #16, r2, LSL #4 ; shifts not permitted with halfword saturations

Show/hideSee also

Copyright © 2011-2012 ARM. All rights reserved.ARM DUI 0588B
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