4.6.1. MPU Type Register

The MPU_TYPE register indicates whether the optional MPU is present, and if so, how many regions it supports. If the MPU is not present the MPU_TYPE register is RAZ. See the register summary in Table 4.48 for its attributes. The bit assignments are:

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Table 4.49. TYPE bit assignments

BitsNameFunction
[31:24]-Reserved.
[23:16]IREGION

Indicates the number of supported MPU instruction regions.

Always contains 0x00. The MPU memory map is unified and is described by the DREGION field.

[15:8]DREGION

Indicates the number of supported MPU data regions depending on your implementation:

0x08

8 MPU regions.

0x10

16 MPU regions.

[7:1]- Reserved.
[0]SEPARATE

Indicates support for unified or separate instruction and date memory maps:

0

Unified.


Copyright © 2015 ARM. All rights reserved.ARM DUI 0646B
Non-ConfidentialID082615