4.5. Processor features

Note

The processor features registers are optional and might not be available in your implementation.

The processor features registers provide software with cache configuration information. The identification space registers are summarized in Table 4.39:

Table 4.39. Identification space summary

AddressNameType

Required

privilege

Reset

value[a]

Description
0xE000ED78CLIDRROPrivileged

0x09000003

Cache Level ID Register
0xE000ED7CCTRROPrivileged0x8303C003Cache Type Register
0xE000ED80CCSIDRROPrivilegedUnknownCache Size ID Registerr
0xE000ED84CSSELRRWPrivilegedUnknownCache Size Selection Register

[a] The reset value is implementation defined.


All registers are only accessible by privileged loads and stores. Unprivileged accesses to these registers result in a BusFault.

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