4.6.9. MPU design hints and tips

Note

Ignore this section if the optional MPU is not present in your implementation.

To avoid unexpected behavior, disable the interrupts before updating the attributes of a region that the interrupt handlers might access.

The processor does not support unaligned accesses to MPU registers.

Note

The MPU registers support aligned word accesses only. Byte and halfword accesses are unpredictable.

When setting up the MPU, and if the MPU has previously been programmed, disable unused regions to prevent any previous region settings from affecting the new MPU setup.

Copyright © 2015, 2018 Arm. All rights reserved.ARM DUI 0646C
Non-ConfidentialID121118