3.4. Memory access instructions

Table 3.5 shows the memory access instructions:

Table 3.5. Memory access instructions

MnemonicBrief descriptionSee
ADRGenerate PC-relative addressADR
CLREXClear ExclusiveCLREX
LDM{mode}Load Multiple registersLDM and STM
LDR{type}Load Register using immediate offsetLDR and STR, immediate offset
LDR{type}Load Register using register offsetLDR and STR, register offset
LDR{type}TLoad Register with unprivileged accessLDR and STR, unprivileged
LDRLoad Register using PC-relative addressLDR, PC‑relative
LDRDLoad Register DualLDR and STR, immediate offset
LDREX{type}Load Register ExclusiveLDREX and STREX
PLDPreload Data.PLD
POPPop registers from stackPUSH and POP
PUSHPush registers onto stackPUSH and POP
STM{mode}Store Multiple registersLDM and STM
STR{type}Store Register using immediate offsetLDR and STR, immediate offset
STR{type}Store Register using register offsetLDR and STR, register offset
STR{type}TStore Register with unprivileged accessLDR and STR, unprivileged
STREX{type}Store Register Exclusive LDREX and STREX

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