3.4.5. LDR, PC‑relative

Load register from memory.


LDR{type}{cond} Rt, label
LDRD{cond} Rt, Rt2, label         ; Load two words



Is one of:


Unsigned byte, zero extend to 32 bits.


Signed byte, sign extend to 32 bits.


Unsigned halfword, zero extend to 32 bits.


Signed halfword, sign extend to 32 bits.

Omit, for word.


Is an optional condition code. See Conditional execution.


Is the register to load or store.


Is the second register to load or store.


Is a PC‑relative expression. See PC‑relative expressions.


LDR loads a register with a value from a PC-relative memory address. The memory address is specified by a label or by an offset from the PC.

The value to load or store can be a byte, halfword, or word. For load instructions, bytes and halfwords can either be signed or unsigned. See Address alignment.

label must be within a limited range of the current instruction. Table 3.7 shows the possible offsets between label and the PC.

Table 3.7. Offset ranges

Instruction typeOffset range
Word, halfword, signed halfword, byte, signed byte−4095 to 4095
Two words−1020 to 1020


You might have to use the .W suffix to get the maximum offset range. See Instruction width selection.


In these instructions:

  • Rt can be SP or PC only for word loads.

  • Rt2 must not be SP and must not be PC.

  • Rt must be different from Rt2.

When Rt is PC in a word load instruction:

  • Bit[0] of the loaded value must be 1 for correct execution, and a branch occurs to this halfword-aligned address.

  • If the instruction is conditional, it must be the last instruction in the IT block.

Condition flags

These instructions do not change the flags.


    LDR     R0, LookUpTable   ; Load R0 with a word of data from an address
                              ; labelled as LookUpTable.
    LDRSB   R7, localdata     ; Load a byte value from an address labelled
                              ; as localdata, sign extend it to a word
                              ; value, and put it in R7.

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