4.9.1. Instruction and Data Tightly-Coupled Memory Control Registers

The ITCMCR and DTCMCR control whether access is mapped to the TCM interfaces or the AXI master interface. The bit assignments are:

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Table 4.69. ITCMCR and DTCMCR bit assignments

BitsNameTypeFunction
[31:7]--Reserved, RAZ/WI.
[6:3]SZRO

TCM size. Indicates the size of the relevant TCM. The values that apply depend on your implementation:

0b0000

No TCM implemented.

0b0011

4KB.

0b0100

8KB.

0b0101

16KB.

0b0110

32KB.

0b0111

64KB.

0b1000

128KB.

0b1001

256KB.

0b1010

512KB.

0b1011

1MB.

0b1100

2MB.

0b1101

4MB.

0b1110

8MB.

0b1111

16MB.

All other encodings are reserved.

[2]RETEN[a]RW

Retry phase enable. When enabled the processor guarantees to honor the retry output on the corresponding TCM interface:

0

Retry phase disabled.

1

Retry phase enabled.

[1]RMW[b]RW

Read-Modify-Write (RMW) enable. Indicates that all sub-chunk writes to a given TCM use a RMW sequence:

0

RMW disabled.

1

RMW enabled.

[0]ENRW

TCM enable. When a TCM is disabled all accesses are made to the AXI master.

0

TCM disabled.

1

TCM enabled.

[a] The RETEN field in the ITCMCR and DTCMCR is used to support the optional error detection and correction in the TCM.

[b] The RMW field in the ITCMCR and DTCMCR is used to support the optional error detection and correction in the TCM.


Enabling the TCM

The TCM interfaces can be enabled at reset in the system by an external signal on the processor. If they are disabled at reset then the following code example can be used to enable both the instruction and data TCM interfaces in software:

ITCMCR  EQU 0xE000EF90DTCMCR  EQU 0xE000EF94        LDR r11, =ITCMCR        LDR r0, [r11]        ORR r0, r0, #0x1    ; Set ITCMCR.EN field        STR r0, [r11]        LDR r11, =DTCMCR        LDR r0, [r11]        ORR r0, r0, #0x1    ; Set DTCMCR.EN field        STR r0, [r11]                        DSB        ISB

Enabling the TCM retry and read-modify-write

If the TCM connected to the processor supports error detection and correction, the TCM interface must be configured to support the retry and read-modify-write features. These can be enabled at reset in the system by external signals on the processor. If they are disabled at reset then the following code example can be used to enable them in software:

ITCMCR  EQU 0xE000EF90DTCMCR  EQU 0xE000EF94        LDR r11, =ITCMCR        LDR r0, [r11]        ORR r0, r0, #0x1:SHL:1    ; Set ITCMCR.RMW field        ORR r0, r0, #0x1:SHL:2    ; Set ITCMCR.RETEN field        STR r0, [r11]        LDR r11, =DTCMCR        LDR r0, [r11]        ORR r0, r0, #0x1:SHL:1    ; Set DTCMCR.RMW field        ORR r0, r0, #0x1:SHL:2    ; Set DTCMCR.RETEN field        STR r0, [r11]                        DSB        ISB
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