4.4. System timer, SysTick

The processor has a 24-bit system timer, SysTick, that counts down from the reload value to zero, reloads, that is wraps to, the value in the SYST_RVR register on the next clock edge, then counts down on subsequent clocks.

Note

When the processor is halted for debugging the counter does not decrement.

The system timer registers are summarized in Table 4.33.

Table 4.33. System timer registers summary

AddressNameType

Required

privilege

Reset

value[a]

Description
0xE000E010SYST_CSRRWPrivileged0x00000004SysTick Control and Status Register
0xE000E014SYST_RVRRWPrivilegedUNKNOWNSysTick Reload Value Register
0xE000E018SYST_CVRRWPrivilegedUNKNOWNSysTick Current Value Register
0xE000E01CSYST_CALIB[b]ROPrivileged

0xC0000000

SysTick Calibration Value Register

[a] The reset value is implementation defined.

[b] The SysTick Calibration Value Register is optional and might not be present in your implementation.


Copyright © 2015, 2018 Arm. All rights reserved.ARM DUI 0646C
Non-ConfidentialID121118