3.7.3. QADD and QSUB

Saturating Add and Saturating Subtract, signed.

Syntax

op{cond} {Rd,} Rn, Rm

Where:

op

Is one of:

QADD

Saturating 32-bit add.

QADD8

Saturating four 8-bit integer additions.

QADD16

Saturating two 16-bit integer additions.

QSUB

Saturating 32-bit subtraction.

QSUB8

Saturating four 8-bit integer subtraction.

QSUB16

Saturating two 16-bit integer subtraction.

cond

Is an optional condition code. See Conditional execution.

Rd

Is the destination register. If Rd is omitted, the destination register is Rn.

Rn, Rm

Are registers holding the first and second operands.

Operation

These instructions add or subtract two, four or eight values from the first and second operands and then writes a signed saturated value in the destination register.

The QADD and QSUB instructions apply the specified add or subtract, and then saturate the result to the signed range −2n–1 ≤ ≤ 2n–1−1, where x is given by the number of bits applied in the instruction, 32, 16 or 8.

If the returned result is different from the value to be saturated, it is called saturation. If saturation occurs, the QADD and QSUB instructions set the Q flag to 1 in the APSR. Otherwise, it leaves the Q flag unchanged. The 8-bit and 16-bit QADD and QSUB instructions always leave the Q flag unchanged.

To clear the Q flag to 0, you must use the MSR instruction, see MSR.

To read the state of the Q flag, use the MRS instruction, see MRS.

Restrictions

Do not use SP and do not use PC.

Condition flags

These instructions do not affect the condition code flags.

If saturation occurs, the QADD and QSUB instructions set the Q flag to 1.

Examples

QADD16   R7, R4, R2  ; Adds halfwords of R4 with corresponding halfword of
                     ; R2, saturates to 16 bits and writes to corresponding
                     ; halfword of R7.
QADD8    R3, R1, R6  ; Adds bytes of R1 to the corresponding bytes of R6,
                     ; saturates to 8 bits and writes to corresponding byte of
                     ; R3.
QSUB16   R4, R2, R3  ; Subtracts halfwords of R3 from corresponding halfword
                     ; of R2, saturates to 16 bits, writes to corresponding
                     ; halfword of R4.
QSUB8    R4, R2, R5  ; Subtracts bytes of R5 from the corresponding byte in
                     ; R2, saturates to 8 bits, writes to corresponding byte of
                     ; R4.
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