3.5.12. SHSUB16 and SHSUB8

Signed Halving Subtract 16 and Signed Halving Subtract 8.

Syntax

op{cond} {Rd,} Rn, Rm

Where:

op

Is one of:

SHSUB16

Signed Halving Subtract 16.

SHSUB8

Signed Halving Subtract 8.

cond

Is an optional condition code. See Conditional execution.

Rd

Is the destination register. If Rd is omitted, the destination register is Rn.

Rn

Is the first operand register.

Rm

Is the second operand register.

Operation

Use these instructions to add 16-bit and 8-bit data and then to halve the result before writing the result to the destination register.

The SHSUB16 instruction:

  1. Subtracts each halfword of the second operand from the corresponding halfwords of the first operand.

  2. Shuffles the result by one bit to the right, halving the data.

  3. Writes the halved halfword results in the destination register.

The SHSUBB8 instruction:

  1. Subtracts each byte of the second operand from the corresponding byte of the first operand.

  2. Shuffles the result by one bit to the right, halving the data.

  3. Writes the corresponding signed byte results in the destination register.

Restrictions

Do not use SP and do not use PC.

Condition flags

These instructions do not change the flags.

Examples

SHSUB16 R1, R0      ; Subtracts halfwords in R0 from corresponding halfword
                    ; of R1 and writes to corresponding halfword of R1.
SHSUB8  R4, R0, R5  ; Subtracts bytes of R0 from corresponding byte in R5,
                    ; and writes to corresponding byte in R4.
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