3.6.8. SMMUL

Signed Most Significant Word Multiply.

Syntax

op{R}{cond} Rd, Rn, Rm

Where:

op

Is one of:

SMMUL

Signed Most Significant Word Multiply

R

If R is present, the result is rounded instead of being truncated. In this case the constant 0x80000000 is added to the product before the top halfword is extracted.

cond

Is an optional condition code. See Conditional execution.

Rd

Is the destination register.

Rn, Rm

Are registers holding the first and second operands.

Operation

The SMMUL instruction interprets the values from Rn and Rm as two’s complement 32-bit signed integers. The SMMUL instruction:

  • Multiplies the values from Rn and Rm.

  • Optionally rounds the result, otherwise truncates the result.

  • Writes the most significant signed 32 bits of the result in Rd.

Restrictions

In this instruction:

  • Do not use SP and do not use PC.

Condition flags

This instruction does not affect the condition code flags.

Examples

SMULL       R0, R4, R5       ; Multiplies R4 and R5, truncates top 32 bits
                             ; and writes to R0.
SMULLR      R6, R2           ; Multiplies R6 and R2, rounds the top 32 bits
                             ; and writes to R6.
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