3.11. Floating-point instructions

This section provides the instruction set that the single-precision and double-precision FPU uses.

Table 3.15 shows the floating-point instructions.


These instructions are only available if the FPU is included, and enabled, in the system. See Enabling the FPU for information about enabling the floating-point unit.

Table 3.15. Floating-point instructions

MnemonicBrief descriptionSee
VABSFloating-point AbsoluteVABS
VADDFloating-point AddVADD
VCMPCompare two floating-point registers, or one floating-point register and zeroVCMP and VCMPE
VCMPECompare two floating-point registers, or one floating-point register and zero with Invalid Operation checkVCMP and VCMPE
VCVTConvert between floating-point and integerVCVT and VCVTR between floating-point and integer
VCVTConvert between floating-point and fixed pointVCVT between floating-point and fixed-point
VCVTRConvert between floating-point and integer with roundingVCVT and VCVTR between floating-point and integer
VCVTBConverts half-precision value to single-precisionVCVTB and VCVTT
VCVTTConverts single-precision register to half-precisionVCVTB and VCVTT
VDIVFloating-point DivideVDIV
VFMAFloating-point Fused Multiply AccumulateVFMA and VFMS
VFNMAFloating-point Fused Negate Multiply AccumulateVFNMA and VFNMS
VFMSFloating-point Fused Multiply SubtractVFMA and VFMS
VFNMSFloating-point Fused Negate Multiply SubtractVFNMA and VFNMS
VLDMLoad Multiple extension registersVLDM
VLDRLoads an extension register from memoryVLDR
VMLAFloating-point Multiply AccumulateVMLA and VMLS
VMLSFloating-point Multiply SubtractVMLA and VMLS
VMOVFloating-point Move ImmediateVMOV Immediate
VMOVFloating-point Move RegisterVMOV Register
VMOVCopy Arm core register to single-precisionVMOV Arm Core register to single-precision
VMOVCopy 2 Arm core registers to 2 single-precisionVMOV two Arm Core registers to two single-precision registers
VMOVCopies between Arm core register to scalarVMOV Arm Core register to scalar
VMOVCopies between Scalar to Arm core registerVMOV Scalar to Arm Core register
VMRSMove to Arm core register from floating-point System RegisterVMRS
VMSRMove to floating-point System Register from Arm Core registerVMSR
VMULMultiply floating-pointVMUL
VNEGFloating-point negateVNEG
VNMLAFloating-point multiply and addVNMLA, VNMLS and VNMUL
VNMLSFloating-point multiply and subtractVNMLA, VNMLS and VNMUL
VNMULFloating-point multiplyVNMLA, VNMLS and VNMUL
VPOPPop extension registersVPOP
VPUSHPush extension registersVPUSH
VSQRTFloating-point square rootVSQRT
VSTMStore Multiple extension registersVSTM
VSTRStores an extension register to memoryVSTR
VSUBFloating-point SubtractVSUB
VSELSelect register, alternative to a pair of conditional VMOVVSEL
VMAXNM, VMINNMMaximum, Minimum with IEEE754-2008 NaN handlingVMAXNM and VMINNM
VCVTA, VCVTN, VCVTP, VCVTMFloat to integer conversion with directed roundingVCVTA, VCVTN, VCVTP and VCVTM
VRINTR, VRINTXFloat to integer (in floating-point format) conversionVRINTR and VRINTX
VRINTA, VRINTN, VRINTP, VRINTMFloat to integer (in floating-point format) conversion with directed roundingVRINTA, VRINTN, VRINTP, VRINTM, and VRINTZ

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