### 3.6.10. SMUL and SMULW

Signed Multiply (halfwords) and Signed Multiply (word by halfword).

#### Syntax

````op`{`X``Y`}{`cond`} `Rd`,`Rn`, `Rm`         ; SMUL
```
````op`{`Y`}{`cond`} `Rd`. `Rn`, `Rm`         ; SMULW
```

For `SMUL{XY}` only:

`op`

Is one of `SMULBB`, `SMULBT`, `SMULTB`, `SMULTT`:

`SMUL{XY}` Signed Multiply (halfwords).

`X` and `Y` specify which halfword of the source registers `Rn` and `Rm` is used as the first and second multiply operand. If `X` is `B`, then the bottom halfword, bits [15:0] of `Rn` is used. If `X` is `T`, then the top halfword, bits [31:16] of `Rn` is used.If `Y` is `B`, then the bottom halfword, bits [15:0], of `Rm` is used. If `Y` is `T`, then the top halfword, bits [31:16], of `Rm` is used.

`SMULW{Y}` Signed Multiply (word by halfword).

`Y` specifies which halfword of the source register `Rm` is used as the second multiply operand. If `Y` is `B`, then the bottom halfword (bits [15:0]) of `Rm` is used. If `Y` is `T`, then the top halfword (bits [31:16]) of `Rm` is used.

`cond`

Is an optional condition code. See Conditional execution.

`Rd`

Is the destination register.

`Rn, Rm`

Are registers holding the first and second operands.

#### Operation

The `SMULBB`, `SMULTB`, `SMULBT` and `SMULTT` instructions interprets the values from `Rn` and `Rm` as four signed 16-bit integers.

These instructions:

• Multiply the specified signed halfword, Top or Bottom, values from `Rn` and `Rm`.

• Write the 32-bit result of the multiplication in `Rd.`

The `SMULWT` and `SMULWB` instructions interprets the values from `Rn` as a 32-bit signed integer and `Rm` as two halfword 16-bit signed integers. These instructions:

• Multiply the first operand and the top, T suffix, or the bottom, B suffix, halfword of the second operand.

• Write the signed most significant 32 bits of the 48-bit result in the destination register.

#### Restrictions

In these instructions:

• Do not use SP and do not use PC.

• `RdHi` and `RdLo` must be different registers.

#### Examples

```SMULBT       R0, R4, R5       ; Multiplies the bottom halfword of R4 with the
```
```                              ; top halfword of R5, multiplies results and
```
```                              ; writes to R0.
```
```SMULBB       R0, R4, R5       ; Multiplies the bottom halfword of R4 with the
```
```                              ; bottom halfword of R5, multiplies results and
```
```                              ; writes to R0.
```
```SMULTT       R0, R4, R5       ; Multiplies the top halfword of R4 with the top
```
```                              ; halfword of R5, multiplies results and writes
```
```                              ; to R0.
SMULTB       R0, R4, R5       ; Multiplies the top halfword of R4 with the
```
```                              ; bottom halfword of R5, multiplies results and
```
```                              ; and writes to R0.
```
```SMULWT       R4, R5, R3       ; Multiplies R5 with the top halfword of R3,
```
```                              ; extracts top 32 bits and writes to R4.
```
```SMULWB       R4, R5, R3       ; Multiplies R5 with the bottom halfword of R3,
```
```                              ; extracts top 32 bits and writes to R4.
```
 Copyright © 2015, 2018 Arm. All rights reserved. ARM DUI 0646C Non-Confidential ID121118 PDF version