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Home > The Cortex-M7 Instruction Set > Multiply and divide instructions > SMUL and SMULW |

Signed Multiply (halfwords) and Signed Multiply (word by halfword).

{`op`

`X`

}{`Y`

}`cond`

,`Rd`

,`Rn`

; SMUL`Rm`

{`op`

}{`Y`

}`cond`

.`Rd`

,`Rn`

; SMULW`Rm`

For `SMUL{`

only:* XY*}

`op`

Is one of

`SMULBB`

,`SMULBT`

,`SMULTB`

,`SMULTT`

:`SMUL{`

Signed Multiply (halfwords).`X`

}`Y`

and`X`

specify which halfword of the source registers`Y`

and`Rn`

is used as the first and second multiply operand. If`Rm`

is`X`

`B`

, then the bottom halfword, bits [15:0] of

is used. If`Rn`

is`X`

`T`

, then the top halfword, bits [31:16] of

is used.If`Rn`

is`Y`

`B`

, then the bottom halfword, bits [15:0], of

is used. If`Rm`

is`Y`

`T`

, then the top halfword, bits [31:16], of

is used.`Rm`

`SMULW{`

Signed Multiply (word by halfword).}`Y`

specifies which halfword of the source register`Y`

is used as the second multiply operand. If`Rm`

is`Y`

`B`

, then the bottom halfword (bits [15:0]) of

is used. If`Rm`

is`Y`

`T`

, then the top halfword (bits [31:16]) of

is used.`Rm`

`cond`

Is an optional condition code. See

*Conditional execution*.`Rd`

Is the destination register.

`Rn, Rm`

Are registers holding the first and second operands.

The `SMULBB`

, `SMULTB`

, `SMULBT`

and `SMULTT`

instructions
interprets the values from

and `Rn`

as
four signed 16-bit integers.

These instructions:

Multiply the specified signed halfword, Top or Bottom, values from

and`Rn`

.`Rm`

Write the 32-bit result of the multiplication in

`Rd.`

The `SMULWT`

and `SMULWB`

instructions
interprets the values from

as
a 32-bit signed integer and `Rn`

as
two halfword 16-bit signed integers. These instructions:

Multiply the first operand and the top, T suffix, or the bottom, B suffix, halfword of the second operand.

Write the signed most significant 32 bits of the 48-bit result in the destination register.

In these instructions:

Do not use SP and do not use PC.

and`RdHi`

must be different registers.`RdLo`

SMULBT R0, R4, R5 ; Multiplies the bottom halfword of R4 with the

; top halfword of R5, multiplies results and

; writes to R0.

SMULBB R0, R4, R5 ; Multiplies the bottom halfword of R4 with the

; bottom halfword of R5, multiplies results and

; writes to R0.

SMULTT R0, R4, R5 ; Multiplies the top halfword of R4 with the top

; halfword of R5, multiplies results and writes

; to R0. SMULTB R0, R4, R5 ; Multiplies the top halfword of R4 with the

; bottom halfword of R5, multiplies results and

; and writes to R0.

SMULWT R4, R5, R3 ; Multiplies R5 with the top halfword of R3,

; extracts top 32 bits and writes to R4.

SMULWB R4, R5, R3 ; Multiplies R5 with the bottom halfword of R3,

; extracts top 32 bits and writes to R4.