2.1.4. Exceptions and interrupts

The Cortex-M7 processor supports interrupts and system exceptions. The processor and the NVIC prioritize and handle all exceptions. An exception changes the normal flow of software control. The processor uses Handler mode to handle all exceptions except for reset. See Exception entry and Exception return for more information.

The NVIC registers control interrupt handling. See Nested Vectored Interrupt Controller for more information.

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