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Home > The Cortex-M7 Instruction Set > Floating-point instructions > VCVT between floating-point and fixed-point |

Converts a value in a register from floating-point to and from fixed-point.

VCVT{}.`cond`

.F<32|64>`Td`

,`<Sd|Dd>`

, #`<Sd|Dd>`

`fbits`

VCVT{}.F<32|64>.`cond`

`Td`

,`<Sd|Dd>`

, #`<Sd|Dd>`

`fbits`

Where:

`cond`

Is an optional condition code. See

*Conditional execution*.`Td`

Is the data type for the fixed-point number. It must be one of:

`S16`

signed 16-bit value.`U16`

unsigned 16-bit value.`S32`

signed 32-bit value.`U32`

unsigned 32-bit value.

`<Sd|Dd>`

Is the destination register and the operand register.

`fbits`

Is the number of fraction bits in the fixed-point number:

If

is`Td`

`S16`

or`U16`

,

must be in the range 0-16.`fbits`

If

is`Td`

`S32`

or`U32`

,

must be in the range 1-32.`fbits`

This instruction:

Either

Converts a value in a register from floating-point to fixed-point.

Converts a value in a register from fixed-point to floating-point.

Places the result in a second register.

The floating-point values are single-precision or double-precision.

The fixed-point value can be 16-bit or 32-bit. Conversions from fixed-point values take their operand from the low-order bits of the source register and ignore any remaining bits.

Signed conversions to fixed-point values sign-extend the result value to the destination register width.

Unsigned conversions to fixed-point values zero-extend the result value to the destination register width.

The floating-point to fixed-point operation uses the ```
Round
towards Zero
```

rounding mode. The fixed-point to floating-point
operation uses the `Round to Nearest`

rounding
mode.