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Home > The Cortex-M7 Instruction Set > About the instruction descriptions > Shift Operations |

Register shift operations move the bits in a register left
or right by a specified number of bits, the *shift length*.
Register shift can be performed:

Directly by the instructions

`ASR`

,`LSR`

,`LSL`

,`ROR`

, and`RRX`

, and the result is written to a destination register.During the calculation of

by the instructions that specify the second operand as a register with shift, see`Operand2`

*Flexible second operand*. The result is used by the instruction.

The permitted shift lengths depend on the shift type and the
instruction, see the individual instruction description or *Flexible second
operand*. If the shift
length is 0, no shift occurs. Register shift operations update the
carry flag except when the specified shift length is 0. The following
sub-sections describe the various shift operations and how they
affect the carry flag. In these descriptions, is
the register containing the value to be shifted, and

`n`

Arithmetic shift right by bits
moves the left-hand

`32`

-`n`

`Rm`

`n`

`32`

-`n`

`n`

You can use the * ASR #* operation
to divide the value in the register

`Rm`

When the instruction is `ASRS`

or when * ASR
#* is used in

`Operand2`

`MOVS`

, `MVNS`

, `ANDS`

, `ORRS`

, `ORNS`

, `EORS`

, `BICS`

, `TEQ`

or `TST`

,
the carry flag is updated to the last bit shifted out, bit[`n`

`Rm`

If

is 32 or more, then all the bits in the result are set to the value of bit[31] of`n`

.`Rm`

If

is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of`n`

.`Rm`

Logical shift right by bits
moves the left-hand

`32`

-`n`

`Rm`

`n`

`32`

-`n`

`n`

bits
of the result to 0. See Figure 3.2.You can use the * LSR #* operation
to divide the value in the register

`Rm`

When the instruction is `LSRS`

or when * LSR
#* is used in

`Operand2`

`MOVS`

, `MVNS`

, `ANDS`

, `ORRS`

, `ORNS`

, `EORS`

, `BICS`

, `TEQ`

or `TST`

,
the carry flag is updated to the last bit shifted out, bit[`n`

`Rm`

If

is 32 or more, then all the bits in the result are cleared to 0.`n`

If

is 33 or more and the carry flag is updated, it is updated to 0.`n`

Logical shift left by bits
moves the right-hand

`32`

-`n`

`Rm`

`n`

`32`

-`n`

`n`

bits
of the result to 0. See Figure 3.3.You can use the * LSL #* operation
to multiply the value in the register

`Rm`

When the instruction is `LSLS`

or when * LSL
#*, with non-zero

`n`

`Operand2`

`MOVS`

, `MVNS`

, `ANDS`

, `ORRS`

, `ORNS`

, `EORS`

, `BICS`

, `TEQ`

or `TST`

,
the carry flag is updated to the last bit shifted out, bit[`32`

-`n`

`Rm`

```
LSL
#0
```

If

is 32 or more, then all the bits in the result are cleared to 0.`n`

If

is 33 or more and the carry flag is updated, it is updated to 0.`n`

Rotate right by

bits
moves the left-hand `n`

`32`

- bits
of the register

`Rm`

`n`

`32`

-`n`

`n`

`n`

When the instruction is `RORS`

or when * ROR
#* is used in

`Operand2`

`MOVS`

, `MVNS`

, `ANDS`

, `ORRS`

, `ORNS`

, `EORS`

, `BICS`

, `TEQ`

or `TST`

,
the carry flag is updated to the last bit rotation, bit[`n`

`Rm`

If

is 32, then the value of the result is same as the value in`n`

, and if the carry flag is updated, it is updated to bit[31] of`Rm`

.`Rm`

`ROR`

with shift length,, more than 32 is the same as`n`

`ROR`

with shift length-32.`n`

Rotate right with extend moves the bits of the register to
the right by one bit. And it copies the carry flag into bit[31]
of the result. See Figure 3.5.

When the instruction is `RRXS`

or when `RRX`

is
used in with
the instructions

`MOVS`

, `MVNS`

, `ANDS`

, `ORRS`

, `ORNS`

, `EORS`

, `BICS`

, `TEQ`

or `TST`

,
the carry flag is updated to bit[0] of the register `Rm`