4.3. System control block

The System Control Block (SCB) provides system implementation information, and system control. This includes configuration, control, and reporting of the system exceptions. The system control block registers are:

Table 4.12. Summary of the system control block registers

AddressNameType

Required

privilege

Reset

value

Description
0xE000E008ACTLRRWPrivileged0x00000000Auxiliary Control Register
0xE000ED00CPUIDROPrivileged

0x411FC272[a]

CPUID Base Register
0xE000ED04ICSRRW[b]Privileged0x00000000Interrupt Control and State Register
0xE000ED08VTORRWPrivilegedUnknownVector Table Offset Register
0xE000ED0CAIRCRRW[b]Privileged

0xFA050000

Application Interrupt and Reset Control Register
0xE000ED10SCRRWPrivileged0x00000000System Control Register
0xE000ED14CCRRWPrivileged0x00000200[a]Configuration and Control Register
0xE000ED18SHPR1RWPrivileged0x00000000System Handler Priority Register 1
0xE000ED1CSHPR2RWPrivileged0x00000000System Handler Priority Register 2
0xE000ED20SHPR3RWPrivileged0x00000000System Handler Priority Register 3
0xE000ED24SHCSRRWPrivileged0x00000000System Handler Control and State Register
0xE000ED28CFSRRWPrivileged0x00000000Configurable Fault Status Register
0xE000ED28MMFSR[c]RWPrivileged0x00MemManage Fault Status Register
0xE000ED29BFSR[c]RWPrivileged0x00BusFault Status Register
0xE000ED2AUFSR[c]RWPrivileged0x0000UsageFault Status Register
0xE000ED2CHFSRRWPrivileged0x00000000HardFault Status Register
0xE000ED34MMFARRWPrivilegedUnknown

MemManage Fault Address Register

0xE000ED38BFARRWPrivilegedUnknownBusFault Address Register
0xE000ED3CAFSRRAZ/WIPrivileged-Auxiliary Fault Status Register not implemented

[a] This reset value is implementation defined.

[b] See the register description for more information.

[c] A subregister of the CFSR.


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