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Home > The Cortex-M7 Instruction Set > Multiply and divide instructions > UMULL, UMAAL, UMLAL |

Unsigned Long Multiply, with optional Accumulate, using 32‑bit operands and producing a 64‑bit result.

{`op`

}`cond`

,`RdLo`

,`RdHi`

,`Rn`

`Rm`

Where:

`op`

Is one of:

`UMULL`

Unsigned Long Multiply.

`UMAAL`

Unsigned Long Multiply with Accumulate Accumulate.

`UMLAL`

Unsigned Long Multiply, with Accumulate.

`cond`

Is an optional condition code. See

*Conditional execution*.,`RdHi`

`RdLo`

Are the destination registers. For

`UMAAL`

and`UMLAL`

they also hold the accumulating value.`Rn`

Is the first operand register.

`Rm`

Is the second operand register.

These instructions interpret the values from

and `Rn`

as
unsigned 32-bit integers.
The

`UMULL`

instruction:Multiplies the two unsigned integers in the first and second operands.

Writes the least significant 32 bits of the result in

`RdLo.`

Writes the most significant 32 bits of the result in

.`RdHi`

The `UMAAL`

instruction:

Multiplies the two unsigned 32-bit integers in the first and second operands.

Adds the unsigned 32-bit integer in

to the 64-bit result of the multiplication.`RdHi`

Adds the unsigned 32-bit integer in

to the 64-bit result of the addition.`RdLo`

Writes the top 32-bits of the result to

.`RdHi`

Writes the lower 32-bits of the result to

.`RdLo`

The `UMLAL`

instruction:

Multiplies the two unsigned integers in the first and second operands.

Adds the 64‑bit result to the 64‑bit unsigned integer contained in

and`RdHi`

.`RdLo`

Writes the result back to

and`RdHi`

.`RdLo`

In these instructions:

Do not use SP and do not use PC.

and`RdHi`

must be different registers.`RdLo`

UMULL R0, R4, R5, R6 ; Multiplies R5 and R6, writes the top 32 bits to R4 ; and the bottom 32 bits to R0. UMAAL R3, R6, R2, R7 ; Multiplies R2 and R7, adds R6, adds R3, writes the ; top 32 bits to R6, and the bottom 32 bits to R3.

UMLAL R2, R1, R3, R5 ; Multiplies R5 and R3, adds R1:R2, writes to R1:R2.