4.2.6. Interrupt Active Bit Registers

The NVIC_IABR0-NVIC_IABR7 registers indicate which interrupts are active. See the register summary in Table 4.2 for the register attributes.

The bit assignments are:

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Table 4.8. IABR bit assignments

BitsNameFunction
[31:0]ACTIVE

Interrupt active flags:

0

Interrupt not active.

1

Interrupt active.


A bit reads as one if the status of the corresponding interrupt is active or active and pending.

Copyright © 2015, 2018 Arm. All rights reserved.ARM DUI 0646C
Non-ConfidentialID121118