4.2.8. Software Trigger Interrupt Register

Write to the STIR to generate an interrupt from software. See the register summary in Table 4.2 for the STIR attributes.

When the USERSETMPEND bit in the SCR is set to 1, unprivileged software can access the STIR, see System Control Register .


Only privileged software can enable unprivileged access to the STIR.

The bit assignments are:

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Table 4.10. STIR bit assignments

[8:0]INTIDInterrupt ID of the interrupt to trigger, in the range 0-239. For example, a value of 0x03 specifies interrupt IRQ3.

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