1.1.1. System level interface

The Cortex-M7 processor provides multiple interfaces using Arm® AMBA® technology to provide high speed, low latency memory accesses. It supports unaligned data accesses.

The Cortex-M7 processor has an optional Memory Protection Unit (MPU) that provides fine grain memory control, enabling applications to utilize multiple privilege levels, separating and protecting code, data and stack on a task-by-task basis. Such requirements are becoming critical in many embedded applications such as automotive.

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