1.1.2. Integrated configurable debug

The Cortex-M7 processor implements a complete hardware debug solution. This provides high system visibility of the processor and memory through either a traditional JTAG port or a 2-pin serial wire debug (SWD) port that is ideal for microcontrollers and other small package devices. The MCU vendor determines the debug feature configuration, therefore debug features can differ across different devices and families.

For system trace the processor integrates an Instrumentation Trace Macrocell (ITM) together with data watchpoints and a profiling unit. To enable simple and cost-effective profiling of the resulting system events, a Serial Wire Viewer (SWV) can export a stream of software-generated messages, data trace, and profiling information through a single pin.

The optional CoreSight™ technology components, Embedded Trace Macrocell (ETM) and Cross Trigger Interface (CTI), deliver unrivalled instruction trace, and implementation-defined data trace and capture in an area far smaller than traditional trace units, enabling many low cost MCUs to implement full instruction trace for the first time.

The Breakpoint Unit can provide up to eight hardware breakpoint comparators that debuggers can use.

Copyright © 2015, 2018 Arm. All rights reserved.ARM DUI 0646C