1.1.4. Cortex-M7 processor core peripherals

The Cortex-M7 processor core peripherals are:

Nested Vectored Interrupt Controller

The NVIC is an embedded interrupt controller that supports low latency interrupt processing.

System Control Block

The System Control Block (SCB) is the programmers model interface to the processor. It provides system implementation information and system control, including configuration, control, and reporting of system exceptions.

System timer

The system timer, SysTick, is a 24-bit count-down timer. Use it as a Real Time Operating System (RTOS) tick timer or as a simple counter.

Integrated instruction and data caches (optional)

The instruction and data caches provide fast access to frequently accessed data and instructions, that support increased average performance when using system based memory.

Memory Protection Unit (optional)

The Memory Protection Unit (MPU) improves system reliability by defining the memory attributes for different memory regions. Depending on your implementation, it provides up to 8 or 16 different regions, and an optional predefined background region.

Floating-point unit (optional)

The FPU provides IEEE754-compliant operations on 32-bit single-precision and implementation-defined 64-bit double-precision floating-point values.

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