4.5.9. MPU usage hints and tips
To avoid unexpected behavior, disable the interrupts before
updating the attributes of a region that the interrupt handlers
might access.
Ensure software uses aligned accesses of the correct size
to access MPU registers, except for the MPU_RASR, it must use aligned
word accesses to MPU registers.
When setting up the MPU, and if the MPU has previously been
programmed, disable unused regions to prevent any previous region
settings from affecting the new MPU setup.
MPU configuration for a microcontroller
Usually, a microcontroller system has only a single processor
and no caches. In such a system, program the MPU as follows:
Table 4.34. Example memory region attributes for a microcontroller
| Memory region | C | B | S | Memory type and attributes |
|---|
| Flash memory | 1 | 0 | 0 | Normal memory, Non-shareable, write-through |
| Internal SRAM | 1 | 0 | 1 | Normal memory, Shareable, write-through |
| External SRAM | 1 | 1 | 1 | Normal memory, Shareable, write-back, write-allocate |
| Peripherals | 0 | 1 | 1 | Device memory, Shareable |
In most microcontroller implementations, the shareability
and cache policy attributes do not affect the system behavior. However,
using these settings for the MPU regions can make the application
code more portable. The values given are for typical situations.
In special systems, such as multiprocessor designs or designs with
a separate DMA engine, the shareability attribute might be important.
In these cases see the recommendations of the memory device manufacturer.
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