1.40 -mfpu

Specifies the target FPU architecture, that is the floating-point hardware available on the target.

Syntax

To view a list of all the supported FPU architectures, use:
-mfpu=list

Note

-mfpu=list is rejected when targeting AArch64.
Alternatively, to specify a target FPU architecture, use:
-mfpu=name
Where name is one of the following:
none
Prevents the compiler from using hardware-based floating-point functions. If the compiler encounters floating-point types in the source code, it will use software-based floating-point library functions. This is similar to the -mfloat-abi=soft option.

Note

When using the ARMv8-M Security Extensions, use this option for compiling secure code to ensure that it does not link with any code that uses floating-point registers.
vfpv3
Enable the ARMv7 VFPv3 floating-point extension. Disable the Advanced SIMD extension.
vfpv3-fp16
Enable the ARMv7 VFPv3 floating-point extension, including the optional half-precision extensions. Disable the Advanced SIMD extension.
vfpv3-d16-fp16
Enable the ARMv7 VFPv3-D16 floating-point extension, including the optional half-precision extensions. Disable the Advanced SIMD extension.
vfpv3xd
Enable the ARMv7 VFPv3XD floating-point extension. Disable the Advanced SIMD extension.
neon
Enable the ARMv7 VFPv3 floating-point extension and the Advanced SIMD extension.
neon-fp16
Enable the ARMv7 VFPv3 floating-point extension, including the optional half-precision extensions, and the Advanced SIMD extension.
vfpv4
Enable the ARMv7 VFPv4 floating-point extension. Disable the Advanced SIMD extension.
neon-vfpv4
Enable the ARMv7 VFPv4 floating-point extension and the Advanced SIMD extension.
fpv5-d16
Enable the ARMv7 FPv5-D16 floating-point extension.
fpv5-sp-d16
Enable the ARMv7 FPv5-SP-D16 floating-point extension.
fp-armv8
Enable the ARMv8 floating-point extension. Disable the cryptographic extension and the Advanced SIMD extension.
neon-fp-armv8
Enable the ARMv8 floating-point extension and the Advanced SIMD extensions. Disable the cryptographic extension.
crypto-neon-fp-armv8
Enable the ARMv8 floating-point extension, the cryptographic extension. and the Advanced SIMD extension.
The -mfpu option overrides the default FPU option implied by the target architecture.

Note

  • The -mfpu option is ignored with AArch64 targets, for example aarch64-arm-none-eabi. Use the -mcpu option to override the default FPU for aarch64-arm-none-eabi targets. For example, to prevent the use of floating-point instructions or floating-point registers for the aarch64-arm-none-eabi target use the -mcpu=name+nofp+nosimd option. Subsequent use of floating-point data types in this mode is unsupported.
  • In ARMv7, the Advanced SIMD extension was called the NEON Advanced SIMD extension.

Default

The default FPU option depends on the target processor.
Related reference
1.37 -mcpu
1.39 -mfloat-abi
1.48 --target
Related information
Using the ARMv8-M Security Extensions
Specifying a target architecture, processor, and instruction set
Preventing the use of floating-point instructions and registers
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