1.37 -mcpu

Enables code generation for a specific ARM® processor.

Note

This topic includes descriptions of [ALPHA] features.

Syntax

To specify a target processor, use:
-mcpu=name
-mcpu=name[+[no]feature+…] (for architectures with optional extensions)
Where:
name
Specifies the processor.
To view a list of all supported processors for your target, use:
-mcpu=list
feature
Is an optional architectural feature that might be enabled or disabled by default depending on the architecture.
+feature enables the feature if it is disabled by default.
+nofeature disables the feature if it is enabled by default.
For AArch64 targets you can specify one or more of the following features if the architecture supports it:
  • crc - CRC extension.
  • crypto - Cryptographic extension.
  • fp - Floating-point extension.
  • [ALPHA] fp16 - ARMv8.2-A half-precision floating-point extension.
  • [ALPHA] profile - ARMv8.2-A statistical profiling extension.
  • simd - Advanced SIMD extension.
For AArch32 targets, you can specify one or more of the following features if the architecture supports it:
  • crc - CRC extension for architectures ARMv8 and above.
  • dsp - DSP extension for the ARMv8-M.mainline architecture.
  • [ALPHA] fp16 - ARMv8.2-A half-precision floating-point extension.

Note

For AArch32 targets, you can use -mfpu to specify the support for floating-point, Advanced SIMD, and cryptographic extensions.

Usage

You can use -mcpu option to enable and disable specific architectural features.
To disable a feature, prefix with no, for example cortex-a57+nocrypto.
To enable or disable multiple features, chain multiple feature modifiers. For example, to enable CRC instructions and disable all other extensions:
armclang --target=aarch64-arm-none-eabi -mcpu=cortex-a57+nocrypto+nofp+nosimd+crc
If you specify conflicting feature modifiers with -mcpu, the rightmost feature is used. For example, the following command enables the floating-point extension:
armclang --target=aarch64-arm-none-eabi -mcpu=cortex-a57+nofp+fp
You can prevent the use of floating-point instructions or floating-point registers for AArch64 targets with the -mcpu=name+nofp+nosimd option. Subsequent use of floating-point data types in this mode is unsupported.

Default

For AArch64 targets (--target=aarch64-arm-none-eabi), the compiler generates generic code for the ARMv8-A architecture in AArch64 state by default.
For AArch32 targets (--target=arm-arm-none-eabi) there is no default. You must specify either -march (to target an architecture) or -mcpu (to target a processor).

Examples

To list the processors that target the AArch64 state:
armclang --target=aarch64-arm-none-eabi -mcpu=list
To target the AArch64 state of a Cortex®‑A57 processor:
armclang --target=aarch64-arm-none-eabi -mcpu=cortex-a57 test.c
To target the AArch32 state of a Cortex‑A53 processor, generating A32 instructions:
armclang --target=arm-arm-none-eabi -mcpu=cortex-a53 -marm test.c
Related reference
1.34 -marm
1.43 -mthumb
1.48 --target
1.40 -mfpu
Related information
Specifying a target architecture, processor, and instruction set
Preventing the use of floating-point instructions and registers
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