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14.4 Interleaving provided by load and store element and structure instructions

Many instructions in this group provide interleaving when structures are stored to memory, and de-interleaving when structures are loaded from memory.

The following figure shows an example of de-interleaving. Interleaving is the inverse process.

Figure 14-1 De-interleaving an array of 3-element structures
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Related concepts
14.5 Alignment restrictions in load and store element and structure instructions
Related references
14.48 VLDn (single n-element structure to one lane)
14.49 VLDn (single n-element structure to all lanes)
14.50 VLDn (multiple n-element structures)
14.127 VSTn (multiple n-element structures)
14.128 VSTn (single n-element structure to one lane)
Related information
Arm Architecture Reference Manual
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Home > Advanced SIMD Instructions (32-bit) > Interleaving provided by load and store element and structure instructions