16.1 A64 instructions in alphabetical order

A summary of the A64 instructions and pseudo-instructions that are supported.

Table 16-1 Summary of A64 general instructions

Mnemonic Brief description See
ADC Add with Carry 16.3 ADC
ADCS Add with Carry, setting flags 16.4 ADCS
ADD (extended register) Add (extended register) 16.5 ADD (extended register)
ADD (immediate) Add (immediate) 16.6 ADD (immediate)
ADD (shifted register) Add (shifted register) 16.7 ADD (shifted register)
ADDS (extended register) Add (extended register), setting flags 16.8 ADDS (extended register)
ADDS (immediate) Add (immediate), setting flags 16.9 ADDS (immediate)
ADDS (shifted register) Add (shifted register), setting flags 16.10 ADDS (shifted register)
ADR Form PC-relative address 16.11 ADR
ADRL pseudo-instruction Load a PC-relative address into a register 16.12 ADRL pseudo-instruction
ADRP Form PC-relative address to 4KB page 16.13 ADRP
AND (immediate) Bitwise AND (immediate) 16.14 AND (immediate)
AND (shifted register) Bitwise AND (shifted register) 16.15 AND (shifted register)
ANDS (immediate) Bitwise AND (immediate), setting flags 16.16 ANDS (immediate)
ANDS (shifted register) Bitwise AND (shifted register), setting flags 16.17 ANDS (shifted register)
ASR (register) Arithmetic Shift Right (register) 16.18 ASR (register)
ASR (immediate) Arithmetic Shift Right (immediate) 16.19 ASR (immediate)
ASRV Arithmetic Shift Right Variable 16.20 ASRV
AT Address Translate 16.21 AT
AUTDA, AUTDZA Authenticate Data address, using key A 16.22 AUTDA, AUTDZA
AUTDB, AUTDZB Authenticate Data address, using key B 16.23 AUTDB, AUTDZB
AUTIA, AUTIZA, AUTIA1716, AUTIASP, AUTIAZ Authenticate Instruction address, using key A 16.24 AUTIA, AUTIZA, AUTIA1716, AUTIASP, AUTIAZ
AUTIB, AUTIZB, AUTIB1716, AUTIBSP, AUTIBZ Authenticate Instruction address, using key B 16.25 AUTIB, AUTIZB, AUTIB1716, AUTIBSP, AUTIBZ
B.cond Branch conditionally 16.26 B.cond
B Branch 16.27 B
BFC Bitfield Clear, leaving other bits unchanged 16.28 BFC
BFI Bitfield Insert 16.29 BFI
BFM Bitfield Move 16.30 BFM
BFXIL Bitfield extract and insert at low end 16.31 BFXIL
BIC (shifted register) Bitwise Bit Clear (shifted register) 16.32 BIC (shifted register)
BICS (shifted register) Bitwise Bit Clear (shifted register), setting flags 16.33 BICS (shifted register)
BL Branch with Link 16.34 BL
BLR Branch with Link to Register 16.35 BLR
BLRAA, BLRAAZ, BLRAB, BLRABZ Branch with Link to Register, with pointer authentication 16.36 BLRAA, BLRAAZ, BLRAB, BLRABZ
BR Branch to Register 16.37 BR
BRAA, BRAAZ, BRAB, BRABZ Branch to Register, with pointer authentication 16.38 BRAA, BRAAZ, BRAB, BRABZ
BRK Breakpoint instruction 16.39 BRK
CBNZ Compare and Branch on Nonzero 16.40 CBNZ
CBZ Compare and Branch on Zero 16.41 CBZ
CCMN (immediate) Conditional Compare Negative (immediate) 16.42 CCMN (immediate)
CCMN (register) Conditional Compare Negative (register) 16.43 CCMN (register)
CCMP (immediate) Conditional Compare (immediate) 16.44 CCMP (immediate)
CCMP (register) Conditional Compare (register) 16.45 CCMP (register)
CINC Conditional Increment 16.46 CINC
CINV Conditional Invert 16.47 CINV
CLREX Clear Exclusive 16.48 CLREX
CLS Count leading sign bits 16.49 CLS
CLZ Count leading zero bits 16.50 CLZ
CMN (extended register) Compare Negative (extended register) 16.51 CMN (extended register)
CMN (immediate) Compare Negative (immediate) 16.52 CMN (immediate)
CMN (shifted register) Compare Negative (shifted register) 16.53 CMN (shifted register)
CMP (extended register) Compare (extended register) 16.54 CMP (extended register)
CMP (immediate) Compare (immediate) 16.55 CMP (immediate)
CMP (shifted register) Compare (shifted register) 16.56 CMP (shifted register)
CNEG Conditional Negate 16.57 CNEG
CRC32B, CRC32H, CRC32W, CRC32X CRC32 checksum performs a cyclic redundancy check (CRC) calculation on a value held in a general-purpose register 16.58 CRC32B, CRC32H, CRC32W, CRC32X
CRC32CB, CRC32CH, CRC32CW, CRC32CX CRC32C checksum performs a cyclic redundancy check (CRC) calculation on a value held in a general-purpose register 16.59 CRC32CB, CRC32CH, CRC32CW, CRC32CX
CSEL Conditional Select 16.60 CSEL
CSET Conditional Set 16.61 CSET
CSETM Conditional Set Mask 16.62 CSETM
CSINC Conditional Select Increment 16.63 CSINC
CSINV Conditional Select Invert 16.64 CSINV
CSNEG Conditional Select Negation 16.65 CSNEG
DC Data Cache operation 16.66 DC
DCPS1 Debug Change PE State to EL1 16.67 DCPS1
DCPS2 Debug Change PE State to EL2 16.68 DCPS2
DCPS3 Debug Change PE State to EL3 16.69 DCPS3
DMB Data Memory Barrier 16.70 DMB
DRPS Debug restore process state 16.71 DRPS
DSB Data Synchronization Barrier 16.72 DSB
EON (shifted register) Bitwise Exclusive OR NOT (shifted register) 16.73 EON (shifted register)
EOR (immediate) Bitwise Exclusive OR (immediate) 16.74 EOR (immediate)
EOR (shifted register) Bitwise Exclusive OR (shifted register) 16.75 EOR (shifted register)
ERET Returns from an exception 16.76 ERET
ERETAA, ERETAB Exception Return, with pointer authentication 16.77 ERETAA, ERETAB
ESB Error Synchronization Barrier 16.78 ESB
EXTR Extract register 16.79 EXTR
HINT Hint instruction 16.80 HINT
HLT Halt instruction 16.81 HLT
HVC Hypervisor call to allow OS code to call the Hypervisor 16.82 HVC
IC Instruction Cache operation 16.83 IC
ISB Instruction Synchronization Barrier 16.84 ISB
LSL (register) Logical Shift Left (register) 16.85 LSL (register)
LSL (immediate) Logical Shift Left (immediate) 16.86 LSL (immediate)
LSLV Logical Shift Left Variable 16.87 LSLV
LSR (register) Logical Shift Right (register) 16.88 LSR (register)
LSR (immediate) Logical Shift Right (immediate) 16.89 LSR (immediate)
LSRV Logical Shift Right Variable 16.90 LSRV
MADD Multiply-Add 16.91 MADD
MNEG Multiply-Negate 16.92 MNEG
MOV (to or from SP) Move between register and stack pointer 16.93 MOV (to or from SP)
MOV (inverted wide immediate) Move (inverted wide immediate) 16.94 MOV (inverted wide immediate)
MOV (wide immediate) Move (wide immediate) 16.95 MOV (wide immediate)
MOV (bitmask immediate) Move (bitmask immediate) 16.96 MOV (bitmask immediate)
MOV (register) Move (register) 16.97 MOV (register)
MOVK Move wide with keep 16.98 MOVK
MOVL pseudo-instruction Load a register with either a 32-bit or 64-bit immediate value or any address 16.99 MOVL pseudo-instruction
MOVN Move wide with NOT 16.100 MOVN
MOVZ Move wide with zero 16.101 MOVZ
MRS Move System Register 16.102 MRS
MSR (immediate) Move immediate value to Special Register 16.103 MSR (immediate)
MSR (register) Move general-purpose register to System Register 16.104 MSR (register)
MSUB Multiply-Subtract 16.105 MSUB
MUL Multiply 16.106 MUL
MVN Bitwise NOT 16.107 MVN
NEG (shifted register) Negate (shifted register) 16.108 NEG (shifted register)
NEGS Negate, setting flags 16.109 NEGS
NGC Negate with Carry 16.110 NGC
NGCS Negate with Carry, setting flags 16.111 NGCS
NOP No Operation 16.112 NOP
ORN (shifted register) Bitwise OR NOT (shifted register) 16.113 ORN (shifted register)
ORR (immediate) Bitwise OR (immediate) 16.114 ORR (immediate)
ORR (shifted register) Bitwise OR (shifted register) 16.115 ORR (shifted register)
PACDA, PACDZA Pointer Authentication Code for Data address, using key A 16.116 PACDA, PACDZA
PACDB, PACDZB Pointer Authentication Code for Data address, using key B 16.117 PACDB, PACDZB
PACGA Pointer Authentication Code, using Generic key 16.118 PACGA
PACIA, PACIZA, PACIA1716, PACIASP, PACIAZ Pointer Authentication Code for Instruction address, using key A 16.119 PACIA, PACIZA, PACIA1716, PACIASP, PACIAZ
PACIB, PACIZB, PACIB1716, PACIBSP, PACIBZ Pointer Authentication Code for Instruction address, using key B 16.120 PACIB, PACIZB, PACIB1716, PACIBSP, PACIBZ
PSB Profiling Synchronization Barrier 16.121 PSB
RBIT Reverse Bits 16.122 RBIT
RET Return from subroutine 16.123 RET
RETAA, RETAB Return from subroutine, with pointer authentication 16.124 RETAA, RETAB
REV16 Reverse bytes in 16-bit halfwords 16.125 REV16
REV32 Reverse bytes in 32-bit words 16.126 REV32
REV64 Reverse Bytes 16.127 REV64
REV Reverse Bytes 16.128 REV
ROR (immediate) Rotate right (immediate) 16.129 ROR (immediate)
ROR (register) Rotate Right (register) 16.130 ROR (register)
RORV Rotate Right Variable 16.131 RORV
SBC Subtract with Carry 16.132 SBC
SBCS Subtract with Carry, setting flags 16.133 SBCS
SBFIZ Signed Bitfield Insert in Zero 16.134 SBFIZ
SBFM Signed Bitfield Move 16.135 SBFM
SBFX Signed Bitfield Extract 16.136 SBFX
SDIV Signed Divide 16.137 SDIV
SEV Send Event 16.138 SEV
SEVL Send Event Local 16.139 SEVL
SMADDL Signed Multiply-Add Long 16.140 SMADDL
SMC Supervisor call to allow OS or Hypervisor code to call the Secure Monitor 16.141 SMC
SMNEGL Signed Multiply-Negate Long 16.142 SMNEGL
SMSUBL Signed Multiply-Subtract Long 16.143 SMSUBL
SMULH Signed Multiply High 16.144 SMULH
SMULL Signed Multiply Long 16.145 SMULL
SUB (extended register) Subtract (extended register) 16.146 SUB (extended register)
SUB (immediate) Subtract (immediate) 16.147 SUB (immediate)
SUB (shifted register) Subtract (shifted register) 16.148 SUB (shifted register)
SUBS (extended register) Subtract (extended register), setting flags 16.149 SUBS (extended register)
SUBS (immediate) Subtract (immediate), setting flags 16.150 SUBS (immediate)
SUBS (shifted register) Subtract (shifted register), setting flags 16.151 SUBS (shifted register)
SVC Supervisor call to allow application code to call the OS 16.152 SVC
SXTB Signed Extend Byte 16.153 SXTB
SXTH Sign Extend Halfword 16.154 SXTH
SXTW Sign Extend Word 16.155 SXTW
SYS System instruction 16.156 SYS
SYSL System instruction with result 16.157 SYSL
TBNZ Test bit and Branch if Nonzero 16.158 TBNZ
TBZ Test bit and Branch if Zero 16.159 TBZ
TLBI TLB Invalidate operation 16.160 TLBI
TST (immediate) , setting the condition flags and discarding the result 16.161 TST (immediate)
TST (shifted register) Test (shifted register) 16.162 TST (shifted register)
UBFIZ Unsigned Bitfield Insert in Zero 16.163 UBFIZ
UBFM Unsigned Bitfield Move 16.164 UBFM
UBFX Unsigned Bitfield Extract 16.165 UBFX
UDIV Unsigned Divide 16.166 UDIV
UMADDL Unsigned Multiply-Add Long 16.167 UMADDL
UMNEGL Unsigned Multiply-Negate Long 16.168 UMNEGL
UMSUBL Unsigned Multiply-Subtract Long 16.169 UMSUBL
UMULH Unsigned Multiply High 16.170 UMULH
UMULL Unsigned Multiply Long 16.171 UMULL
UXTB Unsigned Extend Byte 16.172 UXTB
UXTH Unsigned Extend Halfword 16.173 UXTH
WFE Wait For Event 16.174 WFE
WFI Wait For Interrupt 16.175 WFI
XPACD, XPACI, XPACLRI Strip Pointer Authentication Code 16.176 XPACD, XPACI, XPACLRI
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