8.15 Address alignment in A32/T32 code

In Arm®v7‑A and Armv7‑R, the A bit in the System Control Register (SCTLR) controls whether alignment checking is enabled or disabled. In Armv7‑M, the UNALIGN_TRP bit, bit 3, in the Configuration and Control Register (CCR) controls this.

If alignment checking is enabled, all unaligned word and halfword transfers cause an alignment exception. If disabled, unaligned accesses are permitted for the LDR, LDRH, STR, STRH, LDRSH, LDRT, STRT, LDRSHT, LDRHT, STRHT, and TBH instructions. Other data-accessing instructions always cause an alignment exception for unaligned data.

For STRD and LDRD, the specified address must be word-aligned.

If all your data accesses are aligned, you can use the --no_unaligned_access command-line option to declare that the output object was not permitted to make unaligned access. The linker can then avoid linking in any library functions that support unaligned access if all input objects declare that they were not permitted to use unaligned accesses.

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