20.215 ST4 (vector, multiple structures)

Store multiple 4-element structures from four registers.

Syntax

ST4 { Vt.T, Vt2.T, Vt3.T, Vt4.T }, [Xn|SP] ;

ST4 { Vt.T, Vt2.T, Vt3.T, Vt4.T }, [Xn|SP], imm ;

ST4 { Vt.T, Vt2.T, Vt3.T, Vt4.T }, [Xn|SP], Xm ;

Where:

Vt
Is the name of the first or only SIMD and FP register to be transferred.
Vt2
Is the name of the second SIMD and FP register to be transferred.
Vt3
Is the name of the third SIMD and FP register to be transferred.
Vt4
Is the name of the fourth SIMD and FP register to be transferred.
imm
Is the post-index immediate offset, and can be either #32 or #64.
Xm
Is the 64-bit name of the general-purpose post-index register, excluding XZR.
T
Is an arrangement specifier, and can be one of 8B, 16B, 4H, 8H, 2S, 4S or 2D.
Xn|SP
Is the 64-bit name of the general-purpose base register or stack pointer.

Usage

Store multiple 4-element structures from four registers. This instruction stores multiple 4-element structures to memory from four SIMD and FP registers, with interleaving. Every element of each register is stored.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

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