Gives an overview of the AArch32 state of Arm®v8.
3.1 Changing between A32 and T32 instruction set states.
3.2 Processor modes, and privileged and unprivileged software execution.
3.3 Processor modes in Armv6‑M, Armv7‑M, and Armv8‑M.
3.4 Registers in AArch32 state.
3.5 General-purpose registers in AArch32 state.
3.6 Register accesses in AArch32 state.
3.7 Predeclared core register names in AArch32 state.
3.8 Predeclared extension register names in AArch32 state.
3.9 Program Counter in AArch32 state.
3.10 The Q flag in AArch32 state.
3.11 Application Program Status Register.
3.12 Current Program Status Register in AArch32 state.
3.13 Saved Program Status Registers in AArch32 state.
3.14 A32 and T32 instruction set overview.
3.15 Access to the inline barrel shifter in AArch32 state.