15.1 Summary of floating-point instructions

A summary of the floating-point instructions. Not all of these instructions are available in all floating-point versions.

The following table shows a summary of floating-point instructions that are not available in Advanced SIMD.

Note:

Floating-point vector mode is not supported in Arm®v8. Use Advanced SIMD instructions for vector floating-point.

Table 15-1 Summary of floating-point instructions

Mnemonic Brief description
VABS Absolute value
VADD Add
VCMP, VCMPE Compare
VCVT Convert between single-precision and double-precision
  Convert between floating-point and integer
  Convert between floating-point and fixed-point
  Convert floating-point to integer with directed rounding modes
VCVTB, VCVTT Convert between half-precision and single-precision floating-point
  Convert between half-precision and double-precision
VDIV Divide
VFMA, VFMS Fused multiply accumulate, Fused multiply subtract
VFNMA, VFNMS Fused multiply accumulate with negation, Fused multiply subtract with negation
VJCVT Javascript Convert to signed fixed-point, rounding toward Zero
VLDM Extension register load multiple
VLDR Extension register load
VLLDM Floating-point Lazy Load Multiple
VLSTM Floating-point Lazy Store Multiple
VMAXNM, VMINNM Maximum, Minimum, consistent with IEEE 754-2008
VMLA Multiply accumulate
VMLS Multiply subtract
VMOV Insert floating-point immediate in single-precision or double-precision register, or copy one FP register into another FP register of the same width
VMRS Transfer contents from a floating-point system register to a general-purpose register
VMSR Transfer contents from a general-purpose register to a floating-point system register
VMUL Multiply
VNEG Negate
VNMLA Negated multiply accumulate
VNMLS Negated multiply subtract
VNMUL Negated multiply
VPOP Extension register load multiple
VPUSH Extension register store multiple
VRINT Round to integer
VSEL Select
VSQRT Square Root
VSTM Extension register store multiple
VSTR Extension register store
VSUB Subtract
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