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Home > A64 SIMD Scalar Instructions > UQRSHL (scalar) |
Unsigned saturating Rounding Shift Left (register).
UQRSHL
V
d
, V
n
, V
m
Where:
V
B
, H
, S
or D
.
d
n
m
Unsigned saturating Rounding Shift Left (register). This instruction takes each vector element of the first source SIMD and FP register, shifts the vector element by a value from the least significant byte of the corresponding vector element of the second source SIMD and FP register, places the results into a vector, and writes the vector to the destination SIMD and FP register.
If the shift value is positive, the operation is a left shift. Otherwise, it is a right shift. The results are rounded. For truncated results, see 19.104 UQSHL (scalar, immediate).
If overflow occurs with any of the results, those results are saturated. If saturation occurs, the cumulative saturation bit FPSR.QC is set.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.