20.192 SQSHLU (vector)

Signed saturating Shift Left Unsigned (immediate).

Syntax

SQSHLU Vd.T, Vn.T, #shift

Where:

Vd
Is the name of the SIMD and FP destination register.
T
Is an arrangement specifier, and can be one of the values shown in Usage.
Vn
Is the name of the SIMD and FP source register.
shift
Is the left shift amount, in the range 0 to the element width in bits minus 1, and can be one of the values shown in Usage.

Usage

Signed saturating Shift Left Unsigned (immediate). This instruction reads each signed integer value in the vector of the source SIMD and FP register, shifts each value by an immediate value, saturates the shifted result to an unsigned integer value, places the result in a vector, and writes the vector to the destination SIMD and FP register. The results are truncated. For rounded results, see 20.252 UQRSHL (vector).

If saturation occurs, the cumulative saturation bit FPSR.QC is set.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

The following table shows the valid specifier combinations:

Table 20-70 SQSHLU (Vector) specifier combinations

T shift
8B 0 to 7
16B 0 to 7
4H 0 to 15
8H 0 to 15
2S 0 to 31
4S 0 to 31
2D 0 to 63
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