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Home > A64 Data Transfer Instructions > STLR |
Store-Release Register.
STLR
Wt
, [Xn|SP
{,#0}] ; 32-bit
STLR
Xt
, [Xn|SP
{,#0}] ; 64-bit
Where:
Wt
Xt
Xn|SP
Store-Release Register stores a 32-bit word or a 64-bit doubleword to a memory location, from a register. The instruction also has memory ordering semantics as described in Load-Acquire, Store-Release in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile. For information about memory accesses, see Load/Store addressing modes in the Arm® Architecture Reference Manual Arm®v8, for Arm®v8‑A architecture profile.