Arm Compiler armasm User Guide : 16.83 IC

16.83 IC

Instruction Cache operation.

This instruction is an alias of SYS.

The equivalent instruction is SYS #op1, C7, Cm, #op2{, Xt}.

IC <ic_op>{, Xt}

Where:

<ic_op>: Is an IC instruction name, as listed for the IC system instruction pages, and can be one of the values shown in Usage.
op1: Is a 3-bit unsigned immediate, in the range 0 to 7.
Cm: Is a name Cm, with m in the range 0 to 15.
op2: Is a 3-bit unsigned immediate, in the range 0 to 7.
Xt: Is the 64-bit name of the optional general-purpose source register, defaulting to 31.

Instruction Cache operation. For more information, see A64 system instructions for cache maintenance in the Arm^® Architecture Reference Manual Arm^®v8, for Arm^®v8‑A architecture profile.

The following table shows the valid specifier combinations:

Table 16-8 SYS parameter values corresponding to IC operations

<ic_op>	`op1`	`Cm`	`op2`
IALLU	0	5	0
IALLUIS	0	1	0
IVAU	3	5	1

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