13.130 SMMUL

Signed Most significant word Multiply.


SMMUL{R}{cond} {Rd}, Rn, Rm



is an optional parameter. If R is present, the result is rounded, otherwise it is truncated.


is an optional condition code.


is the destination register.

Rn, Rm

are the registers holding the operands.


is a register holding the value to be added or subtracted from.


SMMUL multiplies the 32-bit values from Rn and Rm, and stores the most significant 32 bits of the 64-bit result to Rd.

If the optional R parameter is specified, 0x80000000 is added before extracting the most significant 32 bits. This has the effect of rounding the result.

Register restrictions

You cannot use PC for any operand.

You can use SP in A32 instructions but this is deprecated. You cannot use SP in T32 instructions.

Condition flags

This instruction does not change the flags.


The 32-bit instruction is available in A32 and T32.

For the Armv7‑M architecture, the 32-bit T32 instruction is only available in an Arm®v7E-M implementation.

There is no 16-bit version of this instruction in T32.


    SMMULGE     r6, r4, r3
    SMMULR      r2, r2, r2
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