13.28 CMP and CMN

Compare and Compare Negative.

Syntax

CMP{cond} Rn, Operand2

CMN{cond} Rn, Operand2

where:

cond
is an optional condition code.
Rn
is the register holding the first operand.
Operand2
is a flexible second operand.

Operation

These instructions compare the value in a register with Operand2. They update the condition flags on the result, but do not place the result in any register.

The CMP instruction subtracts the value of Operand2 from the value in Rn. This is the same as a SUBS instruction, except that the result is discarded.

The CMN instruction adds the value of Operand2 to the value in Rn. This is the same as an ADDS instruction, except that the result is discarded.

In certain circumstances, the assembler can substitute CMN for CMP, or CMP for CMN. Be aware of this when reading disassembly listings.

Use of PC in A32 and T32 instructions

You cannot use PC for any operand in any data processing instruction that has a register-controlled shift.

You can use PC (R15) in these A32 instructions without register controlled shift but this is deprecated.

If you use PC as Rn in A32 instructions, the value used is the address of the instruction plus 8.

You cannot use PC for any operand in these T32 instructions.

Use of SP in A32 and T32 instructions

You can use SP for Rn in A32 and T32 instructions.

You can use SP for Rm in A32 instructions but this is deprecated.

You can use SP for Rm in a 16-bit T32 CMP Rn, Rm instruction but this is deprecated. Other uses of SP for Rm are not permitted in T32.

Condition flags

These instructions update the N, Z, C and V flags according to the result.

16-bit instructions

The following forms of these instructions are available in T32 code, and are 16-bit instructions:

CMP Rn, Rm
Lo register restriction does not apply.
CMN Rn, Rm
Rn and Rm must both be Lo registers.
CMP Rn, #imm
Rn must be a Lo register. imm range 0-255.

Correct examples

    CMP     r2, r9
    CMN     r0, #6400
    CMPGT   sp, r7, LSL #2

Incorrect example

    CMP     r2, pc, ASR r0 ; PC not permitted with register-controlled
                           ; shift.
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